Poland Crypto Processor Chip, Cryptographic Accelerator

Specifications: Cryptographic accelerator chips (crypto coprocessor) for most general purpose microprocessors on the market. As a cryptographic device, this ASIC (Application Specific Integrated Circuit) allows encryption and decryption of data using industry standard TDES (triple des) algorithm in a real time.

The device operates on 64 bit data blocks and uses 168 bits of the input key to encrypt and decrypt data. Throughput up to 90Mbit... The device is offered in three versions for the 8bit, 16bit and 32bit processors.

ENCRYPTION and DECRYPTION TDES (3des, triple des) single pipe engine 48 clock cycles of the internal TDES operation 50 clock cycles for full encryption or decryption 192 bit input key with parity bits 168 bit real security key as defined in the TDES standard Security key parity checking and verification by the general purpose parity verifier Up to 90 Mbit engine throughput with up to 75 MHz clock (~1.25Mbit/MHz) TDES operates in Electronic Codebook (ECB) mode Additional Hardware Multiplexed or non multiplexed bus style can be selected by a single pin Integrated asynchronous 3/8 address decoding circuit (demultiplexer) for hardware simplification Two 8 bit, general purpose output ports mapped to the memory space Active low Interrupt logic for the signaling of the task completion Four general purpose inverters One general purpose AND gate Special logic for non standard integrated circuits like FTDI USB devices